- Office: 09-3081
- Phone: (585) 475-2169
- Fax: (585) 475-5845
- Email: erpeee@rit.edu

Experience
Experience
- Assistant Professor of Electrical Engineering,
Rochester Institute of Technology,
September 2004-Present:
- Advisor for two new master's projects on
reconfigurable computing.
- Teaching: Design for Testability, Digital
System Design, Computer Architecture.
- Serving on Student Affairs subcommittee of the
Academic Senate and Department committees on Graduate Program,
Digital Systems and Computers Curriculum, Senior Design
Projects.
- Senior Software Engineer, Logic Technology
Development, Intel
Corporation, May 2003 - August 2004:
- Provided an efficient, modular method for
automating and running regression tests.
- Assured quality product release through
extensive execution, clarification and revision of tests.
- Protected intellectual property while providing
reliable, concurrent access to scheduled reports.
- Provided customer support for data analysis
tool, with high level of customer satisfaction.
- Taught course on data analysis tool.
- Led internal developer forum.
- Developed controller for fabrication tool.
- Research Assistant, University of Utah,
2000-2002:
- Developed new CAD/EDA algorithms for
concurrency tradeoff exploration for timed circuits.
- Demonstrated several orders of magnitude
improvement compared to theoretical worst case.
- Demonstrated improvement over existing
techniques where direct comparison is available.
- Quality Assurance Engineer, Center for Asynchronous Circuit
& System Design, 1999:
- Created and automated the regression test suite
for the CAD/EDA tool ATACS.
- Linked regression suite to CVS, so when a
developer commits new code, it is automatically checked.
- Configured and managed an on-line bug-tracking
system.
- Research Assistant, ACK project,
University of Utah, 1996-1998:
- Developed technology mapping code for the
CAD/EDA tool ACK.
- Research Assistant, Avalanche project,
University of Utah, 1996:
- Designed, synthesized, simulated, and
fabricated ASIC for distributed, pipelined bus arbitration.
- Developed code and scripts to make sure this
design passed the same tests at each level.
- Teaching Assistant, CP SC 361:
Digital Design, University of Utah, Autumn 1995:
- Taught lab sections and graded lab projects for
40 students.
- Intern, State Senator Suzi Oppenheimer, summer
of 1990.