September 1993 – February 1995
Institute for Design and Research of Automation Control and Test Equipment – IPA, Division for Test and Measurement Equipment Cluj-Napoca, Romania.Position Held: Research and Development Engineer, member of Mr. Gicu Ungureanu’s R&D Group. Accomplishments: I designed, implemented and tested the hardware of a PC based emulator for the Intel MCS-51 family of micro-controllers (principal investigator). Designed, implemented and tested a portable test unit for the diagnosis of faults in a computer system based on the IBM-PC architecture (principal investigator).
July 2002 – PresentRochester Institute of Technology, Electrical Engineering Department, Rochester, NY 14623-5603, USA.
Current Position: Associate Professor
For current research activities and experience, please check the research page.
July 2002 – June 2008
I advised twelve graduate students, of whom four have graduated with thesis and eight with graduate paper – see publications. Graduate research and engineering education work has been published in seven papers at four conferences, organized by IEEE, AIAA and ASEE. As a PI and Project METEOR lead, I have secured $114,500 in internal and $171,000 in external funds.
Project METEOR is a multidisciplinary project. Its educational goal is to provide practice-oriented engineering graduates with hands-on experience. Its technical goal is to develop the necessary technologies for a custom launch system for satellites smaller than 1kg. In the frame of Project METEOR, which has been my focus of the past five years, I have advised and co-advised 97 undergraduate students during their senior design project. I served the role of overall project manager and principal investigator for the electrical systems. Although it has been and continues to be developed mainly by senior students, challenges posed by Project METEOR required students and me to perform a significant research activity. Three EE and two ME graduate students have also contributed work to it, and one out of five senior students have continued and completed the BS/MS program at RIT.
I was instructor for more than 1000 students in more than 50 course sections. I created new or enhanced lecture and lab content for six digital courses in the EE department curricula. The lectures have been updated to the state-of-the-art, and all labs involve hands-on experiences that develop practice oriented skills, for which RIT graduates are highly recognized in the industry.
The EE240 “Introduction to Digital Systems” lab is using now Altera’s Flex10K FPGA and the professional CAD software Quartus II. In the EE347 “Computer Architecture” lab, students design and emulate in an Altera Flex10K FPGA a complete simple RISC processor. In the EE365 “Introduction to Microcomputers” lab, students program in assembly and implement a complete data acquisition and control system using a prototyping board build around the Texas Instruments microcontroller MSP430F149. In the EE650 “Design of Digital Systems using VHDL” lab, students design and implement in VHDL a keyboard interface and a VGA display interface, culminating with the modeling of the EE347 simple RISC processor in VHDL. The EE651 “Physical Implementation of Integrated Circuits” projects have been physically implemented and tested in American Microsystems Inc. 0.5um CMOS technology. In EE732 “Advanced Topics in Digital Systems Design” I covered computer arithmetic circuits and systems. In EE810 “Advanced Computer Architecture” I covered pipelining, hierarchical memory organization and instruction level parallelism. Most recently I added data and thread level parallelism. In January 2005 I was nominated for RIT’s Eisenhart Outstanding Teaching Award. Finally, together with my colleagues Dr. Dan B. Phillips and Dr. Eric R. Peskin, we have published our contributions to engineering education at two prestigious conferences: The International Conference on Engineering Education 2006 and The Annual Conference of the American Society for Engineering Education 2007.
August 1997 – May 2002
Washington State University, Electrical Engineering and Computer Science Department, Pullman, WA 99164-2752, USA.
Positions Held: Research Assistant, Teaching Assistant, Teaching Fellow
January 2001 – May 2002
I worked under the supervision of Prof. Scott Hudson. Researched application-specific performance enhancement of digital and mixed-signal, sub-micron CMOS circuits, using opto-electronic circuit techniques. Designed (transistor level), simulated (Spice), implemented (physical layout) and successfully tested a small footprint, digital cell library-compatible, high speed, analog to digital amplifier. Designed, implemented and tested using the before-mentioned amplifier, a complete opto-electronic receiver to be used in the development of a new scheme for GHz range opto-electronic clock signal distribution. Due to its small footprint, its usage is also envisioned in optical intra- and inter-chip interconnects and/or communications. Designed (transistor level), simulated (Spice), implemented (physical layout) and tested digital and mixed-signal circuit building blocks for an optical-only remote powered, remote clocked, remote interfaced embedded micro-controller. For optical intra- and inter-chip interconnects and/or communications, and for the uplink of the above described micro-controller system, light emitting devices in silicon have been researched, developed and tested. Specifically for the intra-chip interconnects, the possibility of creating optical wave-guides in a standard CMOS technology has been investigated. All above circuits and structures have been fabricated in the TSMC (Taiwan Semiconductor Manufacturing Company) 0.18 um mixed-signal CMOS technology.
September 1998 – December 2000
I worked with Prof. Mark L. Manwaring, currently with BYU, Provo, UT. This research has targeted the implementation of low power, remote powered and remote interrogated bio-medical implants. Researched and designed at the system level a micro-controller architecture optimized for this type of application (RTL and Instruction Set). At the system level, through-the-skin optical power transfer and communication link have been investigated.
August 1997 – August 1998
I worked in the research group of Prof. Mohamed Mojarradi, currently with JPL/NASA. Investigated performance enhancements of CMOS integrated circuits isolated from the substrate by micro-machining (MEMS). I was exposed to clean room work and successfully suspended a photo-detector array.
In spring of 1999 I was instructor with full responsibilities for “Introduction to Microprocessors”. In fall of 1999 I was instructor with full responsibilities for “Introduction to Physical Design of Integrated Circuits” (VLSI senior level class). Co-authored new curricula based on the ABET 2000 criteria. Supervised the physical layout of circuits fabricated through MOSIS. The technologies were AMI CMOS 1.5 um and 0.5 um. As a Teaching Assistant I conducted laboratory work associated with the following classes: Digital Circuits Design, Digital System Design, Computer Architecture Design, Modern Optics Lab (graduate level).Received the 2001 Outstanding Teaching Assistant Award in the College of Engineering and Architecture.
March 1995 – July 1997
Technical University of Cluj-Napoca, Department of Applied Electronics, Cluj-Napoca, RO-3400, ROMANIA.Positions Held: Teaching and Research Assistant (faculty member).
I conducted laboratory sessions for the Electronic Equipment Design class and for the Data Acquisition and Control Systems classes. In fall of 1996 I was instructor with full responsibilities for “Electronic Equipment Design”. I co-supervised with Prof. Mircea Dabacan, 10 senior/master level projects. All projects PCB (printed circuit board) level practical implementations.