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Mehran Mozaffari Kermani

Mehran Mozaffari Kermani


Department of Electrical and Microelectronic Engineering
Rochester Institute of Technology

Room: 09/3185 James E. Gleason Building
Phone: 585-475-6614
Email: m.mozaffari (@rit.edu)

Note: I am elected as the guest editor of the IEEE Transactions on Emerging Topics in Computing for the special issue of Emerging Security Trends for Deeply-Embedded Computing Systems.

Notes: I am a technical program committee member for
- International Conference on Security and Cryptography SECRYPT 2015.
- IEEE Computer Society Annual Symposium on VLSI ISVLSI 2015.
- Fault Diagnosis and Tolerance in Cryptography FDTC 2014.
- Defect and Fault Tolerance in VLSI DFT 2015, 2014.
- RFID Security RFIDsec 2014.
- Lightweight Cryptography for Security and Privacy LightSEC 2014.
- Security, Privacy, and Applied Cryptography Engineering SPACE 2014.
- International Workshop on the Arithmetic of Finite Fields WAIFI 2014.

Biography

Dr. Mozaffari Kermani received the B.Sc. degree in electrical and computer engineering from the University of Tehran, Tehran, Iran, in 2005, and the M.E.Sc. and Ph.D. degrees from the Department of Electrical and Computer Engineering, University of Western Ontario, London, ON, Canada, in 2007 and 2011, respectively. He joined the Advanced Micro Devices as a Senior ASIC/Layout Designer in 2011, integrating sophisticated security/cryptographic capabilities into a single accelerated processing unit.

Dr. Mozaffari Kermani was a recipient of the prestigious Natural Sciences and Engineering Research Council of Canada (NSERC) Post-Doctoral Research Fellowship in 2011. In 2012, he joined the Electrical Engineering Department, Princeton University, Princeton, NJ, USA, as an NSERC Post-Doctoral Research Fellow. Currently, he is with the Department of Electrical and Microelectronic Engineering at Rochester Institute of Technology, Rochester, NY, USA.

His current research interests include emerging security/privacy measures for deeply embedded systems, cryptographic engineering, fault diagnosis and tolerance in cryptographic systems, design for reliability, and low-power secure and efficient FPGA and ASIC designs.

Note: There will be Ph.D. positions available. Interested applicants are advised to contact me and attach their CV and transcripts to proceed.